Do atomics cache repeatable reads in a register ? Or are they just only atomic, i.e. a read may not be split in multiple parts ?
MSVC++, clang++ / clang-cl and g++ don't cache atomic reads without memory ordering:
#include <atomic>
using namespace std;
int x( atomic_int const &ai )
{
int
a = ai.load( memory_order_relaxed ),
b = ai.load( memory_order_relaxed );
return a + b;
}
g++:
movl (%rdi), %edx
movl (%rdi), %eax
addl %edx, %eax
ret
clang-cl:
mov eax, dword ptr [rcx]
add eax, dword ptr [rcx]
ret
cl:
mov edx, DWORD PTR [rcx]
mov eax, DWORD PTR [rcx]
add eax, edx
ret 0`
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